Haralampos STRATIGOPOULOS

LIP6
...
  • CNRS Research Fellow
  • LIP6 - Laboratoire d'Informatique de Paris 6
  • https://www-soc.lip6.fr/users/haralampos-stratigopoulos/
  • Communities
    Mathematics, Computer Science & Robotics
  • Expertise
    AI edge computing
    AI hardware accelerators
    Deep learning
    Dependability
    Hardware
    Machine learning
    Networks
    Neuromorphic computing
    Security
    Spiking neural networks
    Statistical learning

Awards

Best Paper Award from IEEE European Test Symposium (2009, 2012, 2015)

Selected publications

- S. El‑Sayed, Th. Spyrou, A. Pavlidis, E. Afacan, L. Camuñas‑Mesa, B. Linares‑Barranco, Haralampos‑G. Stratigopoulos : “Spiking Neuron Hardware-Level Fault Modeling”, 26th IEEE International Symposium on On-Line Testing and Robust System Design, Naples, Italy (2020).

- M. Elshamy, G. Di Natale, A. Pavlidis, M.‑M. Louërat, Haralampos‑G. Stratigopoulos : “Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism”, IEEE European Test Symposium, Tallinn, Estonia (2020).

- M. Elshamy, A. Sayed, M.‑M. Louërat, A. Rhouni, H. Aboushady, Haralampos‑G. Stratigopoulos : “Securing Programmable Analog ICs Against Piracy”, Design, Automation and Test in Europe Conference, Grenoble, France (2020).

- A. Pavlidis, M.‑M. Louërat, E. Faehn, A. Kumar, Haralampos‑G. Stratigopoulos : “Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP”, Design, Automation and Test in Europe Conference, Grenoble, France (2020).

- J. Leonhard, M.‑M. Louërat, H. Aboushady, O. Sinanoglu, Haralampos‑G. Stratigopoulos : “Mixed-Signal IP Protection Against Piracy Based on Logic Locking”, 32. GI / GMM / ITG - Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Ludwigsburg, Germany (2020). 

International collaborations

Microelectronics Institute of Sevilla, The University of Texas at Dallas, École Central de Lyon/INL, Université de Rennes/IRISA, Université Grenoble Alpes/TIMA

Industrial collaborations

Thales

Intel